1. Field of the Invention
The present invention relates generally to the field of computer systems, and in particular to methods and mechanisms for upgrading quality-of-service (QoS) levels of memory transactions.
2. Description of the Related Art
To prioritize some transactions over other transactions in the movement through a system on chip (SoC) fabric, a quality-of-service (QoS) mechanism may be implemented such that an agent generating a transaction may also provide information representing the QoS associated with that transaction. In a typical scenario, arbiters and queues in the path of a memory request or transaction containing QoS information should be capable of processing that information or forwarding the information to a subsequent circuit which is then capable of processing it. In addition, logic implemented in a SoC should be able to efficiently upgrade or push older transactions when younger transactions with a higher QoS level are waiting behind the older transactions. In some cases, transactions may be stored in a queue, and logic may be utilized to search the queue's existing transactions when a new transaction is received by the queue. However, repeating these searches every time a new transaction is received by the queue is inefficient in terms of power consumption.